Prior art Class D amplifier Control Units (CDCUs), require the use of stable, low jitter system clocks. These clocks must provide low jitter clock signals, exactly matching the digital audio input signal's digital sampling rate over time and temperature, in order for the CDCU to produce Pulse Width Modulated (PWM) signals that can be efficiently, and inexpensively, converted to analog output signals exhibiting acceptably low noise and distortion characteristics. In particular, spurious tones appear in the analog output signal when systems clocks are employed that do not meet these criteria.
Today, in order to meet analog output signal noise and distortion requirements, Class-AB power amplifiers are predominantly used. These amplifiers are inefficient in terms of power consumption and die area. In some cases Class D amplifiers are used, but, as discussed above, these suffer from strict systems requirements that result in high cost integrated circuit implementations, and require complex, lengthy and costly calibration procedures to be employed at the time of systems manufacture, in order to meet acceptable noise and distortion limits. Sometimes these Class D amplifier prior art solutions cannot meet acceptable audio quality requirements, even after calibration.